Chip

A compact 300-GHz-band 4×4 bi-directional phased-array transceiver in 65-nm CMOS has been developed, as reported by researchers from Institute of Science Tokyo. While free space path loss is a significant challenge for the 300-GHz-band in wireless systems, this development can mitigate the problem, resulting in significant advancement in 6G wireless communication.

240-270 GHz 4×4 Bi-Directional Phased-Array Transceiver for Wireless Communication

Modern wireless communication systems prefer higher frequencies to meet the growing demand for faster data transfer. The 300-GHz-band, which lies near the lower end of the terahertz range, is a promising candidate for future sixth-generation (6G) wireless systems because it can support very high data rates and minimize atmospheric attenuation. However, using such high frequencies comes with major engineering challenges. Radio waves in this range suffer from severe free space path loss (FSPL), making signal transmission challenging over practical distances.

Phased-array transceivers, which combine multiple antenna elements and electronically control their signal phases to steer a radio beam, can help mitigate the limitation. This beam steering can direct energy toward a desired receiver and help recover the link budget. But building compact, low-power phased arrays at around 300 GHz is extremely difficult, especially when the antennas and bidirectional transmit-receive circuitry must fit on the same chip with half-wavelength spacing between the elements.

A research team led by Professor Kenichi Okada of the Department of Electrical and Electronic Engineering, School of Engineering, Institute of Science Tokyo (Science Tokyo), Japan, has successfully realized a two-dimensional phased-array transceiver capable of wireless communication in the terahertz band, entirely in complementary metal-oxide-semiconductor (CMOS)-integrated-circuit technology, including the antennas and bidirectional transmit/receive circuitry. The study, which was presented at the 2026 IEEE/JSAP Symposium on VLSI Technology and Circuits, held in Honolulu, USA, from June 14 to June 18, 2026, is expected to significantly accelerate the realization and widespread adoption of next-generation high-speed 6G wireless systems operating in this frequency band.

The developed transceiver operates over 240-270 GHz and is designed for compact, low-power wireless communication. Each element includes a phase shifter, frequency doubler, sub-terahertz injection-locked tripler, sub-harmonic mixer, and on-chip dipole antenna. The array pitch is approximately half a wavelength, with element spacing of 0.49 λ in the E-plane and 0.50 λ in the H-plane. This compact arrangement helps suppress unwanted grating lobes while enabling bi-directional transmission using a compact mixer-last and mixer-first architecture. The integrated on-chip antennas allow direct wireless communication through the free space.

The array achieves half‑wavelength spacing including the antennas. This work represents the world's first realization of a fully integrated 2D array-including the antennas-at frequencies above 200 GHz. In communication tests, the transmitter supported a 16-Gbaud QPSK link, while the receiver supported a 26-Gbaud QPSK link. Importantly, each transceiver element consumed only 26 mW and occupied a compact core area of 0.30 mm2.

"This represents the first 300-GHz-band two-dimensional bi-directional phased-array transceiver with on-chip half-wavelength-spaced antennas implemented as a single all-CMOS chip. The low-power consumption and small chip area per element are particularly important because future terahertz wireless systems will require compact, scalable, and manufacturable front-end hardware," mentions Okada.

By demonstrating a compact 300-GHz-band phased-array transceiver using a low-cost and mass-producible CMOS, this work is a significant advancement for next-generation wireless systems. While further development will be needed before large-scale deployment, the study shows that highly integrated terahertz-band wireless front ends can be built using practical silicon technology.

Okada concludes, "The achievement may accelerate research related to 6G wireless systems and beyond, where compact phased arrays, beam steering, and low-power terahertz circuits will be essential for realizing ultra-high-speed wireless links."

This work is partially supported by National Institute of Information and Communications Technology (NICT) in Japan (JPJ012368C00801).